1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device, and more particularly, to a liquid crystal display (LCD) device and a method for fabricating the same, to obtain high aperture ratio and solve the problem by using the force of gravity.
2. Discussion of the Related Art
Demands for various display devices have increased with the development of an information society. Accordingly, many efforts have been made to research and develop various flat display devices such as liquid crystal displays (LCD), plasma display panels (PDP), electroluminescent displays (ELD), and vacuum fluorescent displays (VFD). Some species of flat display devices have already been applied to displays for various equipment.
Among the various flat display devices, liquid crystal display (LCD) devices have been most widely used due to advantageous characteristics of a thin profile, lightweight, and low power consumption, whereby the LCD devices provide a substitute for a cathode ray tube (CRT). In addition to mobile type LCD devices such as displays for a notebook computer, LCD devices have been developed for computer monitors and televisions to receive and display broadcasting signals.
Despite various technical developments in LCD technology having applications in different fields, research for enhancing the picture quality of the LCD device has been, in some respects, lacking as compared to other features and advantages of the LCD device. In order to use LCD devices in various fields as a general display, it is important that LCD devices have a high quality picture, such as high resolution and high luminance with a large-sized screen, while still maintaining a light weight, a thin profile, and low power consumption.
A general LCD device includes an LCD panel for displaying a picture image, and a driving part for applying a driving signal to the LCD panel. The LCD panel includes first and second glass substrates being bonded to each other at a predetermined interval therebetween, and a liquid crystal layer injected between the first and second glass substrates.
The first glass substrate (TFT array substrate) includes a plurality of gate and data lines, a plurality of pixel electrodes, and a plurality of thin film transistors. At this time, the plurality of gate lines are formed on the first glass substrate at fixed intervals, and the plurality of data lines are formed substantially perpendicular to the plurality of gate lines at fixed intervals. Then, the plurality of pixel electrodes, arranged in a matrix-type configuration, are respectively formed in pixel regions defined by the plurality of gate and data lines crossing each other. The plurality of thin film transistors are switched according to signals on the gate lines to transmit signals from the data lines to the respective pixel electrodes.
The second glass substrate (color filter substrate) includes a black matrix layer that blocks light from regions of the display, except the pixel regions of the first substrate, R/G/B color filter layer for displaying various colors, and a common electrode to obtain the picture image. For an In-Plane Switching (IPS) mode LCD device, the common electrode is formed on the first glass substrate.
Next, a predetermined space is maintained between the first and second glass substrates by spacers, and the first and second substrates are bonded to each other by a seal pattern having a liquid crystal injection inlet. At this time, the liquid crystal layer is formed according to a liquid crystal injection method, in which the liquid crystal injection inlet is dipped into a vessel having liquid crystal while maintaining a vacuum state in the predetermined space between the first and second glass substrates. That is, the liquid crystal is injected between the first and second substrates by an osmotic action. Then, the liquid crystal injection inlet is sealed with a sealant.
Meanwhile, the LCD device is driven according to the optical anisotropy and polarization of liquid crystal material. Liquid crystal molecules are aligned using directional characteristics because the liquid crystal molecules each has long and thin shapes. An induced electric field may be applied to the liquid crystal to control the alignment direction of the liquid crystal molecules. If the alignment direction of the liquid crystal molecules is controlled by the induced electric field, the light is polarized and changed by the optical anisotropy of the liquid crystal, thereby displaying a picture image. In this state, the liquid crystal is classified into positive (+) type liquid crystal having positive dielectric anisotropy and negative (−) type liquid crystal having negative dielectric anisotropy according to electrical characteristics of the liquid crystal. In the positive (+) type liquid crystal, a longitudinal (major) axis of a positive (+) liquid crystal molecule is in parallel to the electric field applied to the liquid crystal. Meanwhile, in the negative (−) type liquid crystal, a longitudinal (major) axis of a negative (−) liquid crystal molecule is perpendicular to the electric field applied to the liquid crystal.
FIG. 1 is an exploded perspective view illustrating a general Twisted Nematic (TN) mode LCD device. As shown in FIG. 1, the TN mode LCD device includes a lower substrate 1 and an upper substrate 2 bonded to each other with a predetermined interval therebetween, and a liquid crystal layer 3 injected between the lower and upper substrates 1 and 2.
More specifically, the lower substrate 1 includes a plurality of gate lines 4, a plurality of data lines 5, a plurality of pixel electrodes 6, and a plurality of thin film transistors T. The plurality of gate lines 4 are formed on the lower substrate 1 in one direction at fixed intervals, and the plurality of data lines 5 are formed substantially perpendicular to the plurality of gate lines 4 at fixed intervals, thereby defining a plurality of pixel regions P. Then, the plurality of pixel electrodes 6 are respectively formed in the pixel regions P defined by the plurality of gate and data lines 4 and 5 crossing each other, and the plurality of thin film transistors T are respectively formed at crossing portions of the plurality of gate and data lines 4 and 5. The upper substrate 2 includes a black matrix layer 7 that blocks light from regions of the display except the pixel regions P, R/G/B color filter layers 8 for displaying various colors, and a common electrode 9 for displaying a picture image.
At this time, the thin film transistor T includes a gate electrode, a gate insulating layer (not shown), an active layer, a source electrode, and a drain electrode. The gate electrode projects from the gate line 4, and the gate insulating layer (not shown) is formed on an entire surface of the lower substrate. Then, the active layer is formed on the gate insulating layer above the gate electrode. The source electrode projects from the data line 5, and the drain electrode is formed opposite of the source electrode. Also, the aforementioned pixel electrode 6 is formed of transparent conductive metal having great transmittance, such as ITO (Indium-Tin-Oxide).
In the aforementioned LCD device, liquid crystal molecules of the liquid crystal layer 3 on the pixel electrode 6 are aligned with a signal applied from the thin film transistor T, and light transmittance is controlled according to the alignment of liquid crystal, thereby displaying the picture image. In this state, an LCD panel drives the liquid crystal molecules by an electric field perpendicular to the lower and upper substrates. This method results in great transmittance and high aperture ratio. Also, it is possible to prevent liquid crystal cells from being damaged by static electricity because the common electrode 9 of the upper substrate 2 serves as the ground. However, in the case of driving the liquid crystal molecules by the electric field perpendicular to the lower and upper substrates, it is difficult to obtain a wide viewing angle.
In order to overcome these problems, an In-Plane Switching (IPS) mode LCD device has recently been developed. Hereinafter, the related art IPS mode LCD device will be described with reference to the accompanying drawings. FIG. 2 is a cross-sectional view schematically illustrating the related art IPS mode LCD device. In the related art IPS mode LCD device, as shown in FIG. 2, a common electrode 13 and a pixel electrode 12 are formed on the same plane of a lower substrate 11. Then, the lower substrate 11 is bonded to an upper substrate 15 with a predetermined interval therebetween, and liquid crystal 14 is formed between the lower and upper substrates 11 and 15. The liquid crystal 14 is driven by an electric field formed between the common electrode 13 and the pixel electrode 12 on the lower substrate 11.
FIG. 3A and FIG. 3B illustrate the alignment direction of liquid crystal when a voltage is turned on/off in the related art IPS mode LCD device.
FIG. 3A illustrates the related art IPS mode LCD device when the voltage is turned off. That is, an electric field parallel to the lower and upper substrates is not applied to the common electrode 13 or the pixel electrode 12. Accordingly, there is no change in alignment of the liquid crystal 14. For example, liquid crystal molecules are basically twisted at 45° to a horizontal direction of the pixel electrode 12 and the common electrode 13.
FIG. 3B illustrates the related art IPS mode LCD device when the voltage is turned on. That is, the electric field parallel to the lower and upper substrates is applied to the common electrode 13 and the pixel electrode 12, thereby changing the alignment of the liquid crystal 14. In more detail, the alignment of liquid crystal 14 is twisted more at 45° as compared to the alignment of liquid crystal when the voltage is turned off. In this state, the horizontal direction of the common and pixel electrodes 13 and 12 is identical to the twisted direction of liquid crystal.
As mentioned above, the related art IPS mode LCD device has the common electrode 13 and the pixel electrode 12 on the same plane. Thus, it has advantageous characteristics such as a wide viewing angle. For example, along a front direction of the IPS mode LCD device, a viewer may have a viewing angle of 70° in all directions (i.e., lower, upper, left, and right directions). Furthermore, the related art IPS mode LCD device has simplified fabrication process, and reduced color shift. However, the related art IPS mode LCD device has the problems of low light transmittance and low aperture ratio because the common electrode 13 and the pixel electrode 12 are formed on the same substrate. Also, it is necessary to improve the response time of the driving voltage, and to maintain the uniform cell gap due to the small misalignment margin for the cell gap. That is, the IPS mode LCD device has the aforementioned advantages and disadvantages, whereby a user can select the mode of the LCD device to achieve a desired purpose.
FIG. 4A and FIG. 4B are perspective views illustrating the operation of the IPS mode LCD device on the turning on/off state. Referring to FIG. 4A, when a voltage is not supplied to the pixel electrode 12 or the common electrode 13, the alignment direction 16 of the liquid crystal molecules is identical to the alignment direction of an initial alignment layer (not shown). Then, as shown in FIG. 4B, when the voltage parallel to substrates is supplied to the pixel electrode 12 and the common electrode 13, the alignment direction 16 of the liquid crystal molecules corresponds to an electric field application direction 17.
Hereinafter, a related art LCD device will be described with reference to the accompanying drawings.
FIG. 5 is a plan view illustrating a related art IPS mode LCD device. FIG. 6 is a cross-sectional view taken along lines I-I′ and II-II′ of FIG. 5.
In the related art LCD device, as shown in FIG. 5 and FIG. 6, a transparent lower substrate 100 includes a gate line 101, a gate electrode 101a, a first common line 101b, a gate insulating layer 102, an active layer 103, a data line 104, a source electrode 104a, a drain electrode 104b, a storage electrode 104c, a planarization layer 105, a contact hole 106, a second common line 107a, a common electrode 107b, and a pixel electrode 107c. 
The gate line 101 is formed on the transparent lower substrate 100 in one direction, and the gate electrode 101a protrudes from one portion of the gate line 101. Also, the first common line 101b is formed of the same material and on the same layer as the gate line 101, and the gate insulating layer 102 is formed on an entire surface of the lower substrate 100 including the gate electrode 101a and the first common line 101b. Then, the island-shaped active layer 103 is formed on the gate insulating layer 102 above the gate electrode 101a. After that, the data line 104 is formed substantially perpendicular to the gate line 101, to define a pixel region. The source electrode 104a protruding from the data line 104 is overlapped with one side of the active layer 103, and the drain electrode 104b is overlapped with the other side of the active layer 103 at a predetermined distance from the source electrode 104a. Then, the storage electrode 104c is formed above the first common line 101b, and the planarization layer 105 is formed on the entire surface of the lower substrate 100 including the data line 104, the source electrode 104a and the drain electrode 104b. Also, the contact hole 106 exposing one portion of the drain electrode 104b is formed in the planarization layer 105. The second common line 107a is formed in the planarization layer 105 of the lower substrate 100 including the source electrode 104a and the drain electrode 104b, and the common electrode 107b is formed as one with the second common line 107a above the data line 104 and in one portion of the pixel region. Then, the pixel electrode 107c is in contact with the drain electrode 104b through the contact hole 106, and formed between the common electrodes 107b at fixed intervals.
Next, an upper substrate 90 is formed in opposite to the lower substrate 100. The upper substrate 90 includes a black matrix layer 91 that blocks light from regions of the display except the pixel regions of the lower substrate 100, and R/G/B color filter layers 92 (not shown) corresponding to the pixel regions. In consideration of the bonding margin of the upper and lower substrates in the area corresponding to a thin film transistor TFT, the black matrix layer 91 of the upper substrate 90 has a large space.
Thereafter, a column spacer 80 is formed in the area corresponding to the gate or data line to maintain a cell gap when bonding the upper and lower substrates 90 and 100. At this time, the column spacer 80 may be formed on any one of the upper and lower substrates 90 and 100.
However, the related art LCD device has the following disadvantages. It is possible to obtain the high aperture ratio in the related art LCD device. However, as the LCD panel becomes large, the liquid crystal flows in all directions of the upper/lower/left/right side in the LCD panel, thereby generating spots on a screen.